ST STM32N6 Reaches Volume Availability: An Edge-AI MCU with an On-Chip NPU

The STM32N6 is the first STM32 with the in-house Neural-ART accelerator, delivering up to 600 GOPS alongside an 800MHz Cortex-M55 — bringing edge AI into the MCU cost range.

Within the STM32 family, the STM32N6 is a watershed: the first STM32 with the in-house Neural-ART Accelerator NPU from ST. Announced in December 2024 and in distribution since early 2025, it has reached volume availability as development boards and the software ecosystem matured through 2026.

Key specifications

  • The Neural-ART NPU delivers up to 600 GOPS of AI inference, hundreds of times faster than previous STM32 generations by the official claim;
  • An Arm Cortex-M55 core runs at up to 800MHz with Helium vector extensions;
  • Aimed at edge vision, audio and predictive maintenance, with model deployment through STM32Cube.AI.

Why it matters to the supply chain

The significance goes beyond performance: the N6 moves the question of whether an NPU is needed from the application-processor tier down to MCUs, letting many designs that used discrete AI accelerators consolidate into a single device. For buyers that is both a cost-down opportunity and a new supply risk — new-ramp capacity is tight and leading-edge supply favors large customers. Lock futures allocations early for edge-AI programs and prepare second sources for critical lots.

For spot, futures and alternate-source evaluation of the STM32N6, submit an RFQ through Xinyuda Electronics.